Date of Award
Electrical and Computer Engineering
Engineering, Electronics and Electrical.
CC BY-NC-ND 4.0
The purpose of this thesis is to design an automatic layout generator for high speed systolic VLSI integrated circuits using the Residue Number System. This entire process can be completed with minimum user intervention. The WINDsor SILicon Compiler (WINDSILC) is part of a system to automate the design of high speed application specific VLSI chips. It creates a user friendly environment for generating and simulating such chips. Finally, WINDSILC also provides facilities for automatically creating the files required for testing the chip after fabrication on ASIX tester.Dept. of Electrical and Computer Engineering. Paper copy at Leddy Library: Theses & Major Papers - Basement, West Bldg. / Call Number: Thesis1991 .J345. Source: Masters Abstracts International, Volume: 31-01, page: 0392. Thesis (M.A.Sc.)--University of Windsor (Canada), 1991.
Jaekel, Martin., "Silicon compiler for implementation of systolic arrays using finite ring arithmetic." (1991). Electronic Theses and Dissertations. 3458.