Date of Award

2013

Publication Type

Master Thesis

Degree Name

M.A.Sc.

Department

Electrical and Computer Engineering

Keywords

Applied sciences, FPGA, NOC, Routers

Supervisor

Mohammed S. Khalid

Rights

info:eu-repo/semantics/openAccess

Abstract

Network on Chip (NoC) is an interconnection paradigm which is scalable and efficient for connecting increasing number of components on Field Programmable Systems on Chip (FPSOC). The router is a key component in NoC that impacts area performance, power consumption, etc. In this thesis we evaluate and compare two different router designs using real world benchmark. The first router uses Store-And-Forward strategy (SAF) and XY routing algorithm and the second router uses Wormhole (WH) as forwarding strategy and source routing algorithm. These routers were used to implement 4x4 mesh NoCs. A multi processor system benchmark obtained from Altera was implemented in each NoC. This enabled us to evaluate and compare the routers using the real world benchmark design. The evaluation metrics used were area, throughput, power consumption and maximum clock frequency. Experiment results show that the SAF router is superior to the WH Router.

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