Date of Award

2011

Publication Type

Master Thesis

Degree Name

M.A.Sc.

Department

Electrical and Computer Engineering

First Advisor

Ahmadi, Majid (Electrical and Computer Engineering)

Keywords

Electrical engineering.

Rights

info:eu-repo/semantics/openAccess

Creative Commons License

Creative Commons Attribution-Noncommercial-No Derivative Works 4.0 License
This work is licensed under a Creative Commons Attribution-Noncommercial-No Derivative Works 4.0 License.

Abstract

This thesis presents a new readout circuit with integrated Built-in Self-Test (BIST) structure for capacitive Micro-Electro-Mechanical Systems (MEMS). In the proposed solution instead of commonly used voltage control signals to test the device, charge control stimuli are employed to cover a wider range of structural defects. The proposed test solution eliminates the risk of MEMS structural collapse in the test phase. Measurement results using a prototype fabricated in TSMC 65nm CMOS technology indicate that the proposed BIST scheme can successfully detect minor structural defects altering MEMS nominal capacitance.

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