Date of Award


Publication Type

Master Thesis

Degree Name



Electrical and Computer Engineering


Engineering, Electronics and Electrical.



Creative Commons License

Creative Commons Attribution-Noncommercial-No Derivative Works 4.0 License
This work is licensed under a Creative Commons Attribution-Noncommercial-No Derivative Works 4.0 License.


Digital signal processing (DSP) permeates many of the products we see around us today. DSP systems manipulate signals as sequences of numbers, and require massive arithmetic computations to perform algorithmic processing such as filtering. Traditionally these systems are designed using the binary number system to perform the computations. This thesis presents an exploration into the construction of finite impulse response (FIR) filters using a recently introduced number system. The number system uses two orthogonal bases and has been referred to in literature as the Double-Base Number System (DBNS). We use an index calculus implementation of the DBNS to take advantage of the logarithmic-like properties of the associated arithmetic. This thesis investigates a recently disclosed architecture for inner product computations in the DBNS. This architecture is expanded from the initial single-digit DBNS form to a hybrid (mix of 1-digit and 2-digit forms) and finally a full 2-digit form, and we show the efficiencies obtained in using the full 2-digit form. We target the implementation of large tap length Finite Impulse Response (FIR) filters, and we examine both the problem of finite precision index coefficient design and the design and fabrication of a systolic architecture using DBNS processors. (Abstract shortened by UMI.)Dept. of Electrical and Computer Engineering. Paper copy at Leddy Library: Theses & Major Papers - Basement, West Bldg. / Call Number: Thesis2001 .E85. Source: Masters Abstracts International, Volume: 40-03, page: 0753. Thesis (M.A.Sc.)--University of Windsor (Canada), 2001.