Date of Award
Electrical and Computer Engineering
Coulomb blockade, Multiple-valued logic, Negative Differential Conductance, Single-electron transistor
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This thesis proposes a new single-electron tunneling based NDC block and develops an analytical model which can be used for related circuit designs and/or their performance optimization. A piece-wise model is used to describe the I-V characteristics of the proposed NDC block. Four applications based on this NDC block are proposed: (1) Multiple-valued logic static memory cell (2) Schmitt trigger (3) Three-stage ring oscillator (4) ternary full adder using hybrid single-electron transistor and MOS technology. Simulation was done using Cadence Spectre simulator with 180nnm CMOS model and SET MIB macro mode to estimate the performance.
Li, Lin, "DESIGN OF MULTI-VALUED LOGIC CELLS USING SINGLE-ELECTRON DEVICES" (2016). Electronic Theses and Dissertations. 5743.