Date of Award
2016
Publication Type
Master Thesis
Degree Name
M.A.Sc.
Department
Electrical and Computer Engineering
Keywords
Coulomb blockade, Multiple-valued logic, Negative Differential Conductance, Single-electron transistor
Supervisor
Chen, Chunhong
Rights
info:eu-repo/semantics/openAccess
Creative Commons License
This work is licensed under a Creative Commons Attribution-NonCommercial-No Derivative Works 4.0 International License.
Abstract
This thesis proposes a new single-electron tunneling based NDC block and develops an analytical model which can be used for related circuit designs and/or their performance optimization. A piece-wise model is used to describe the I-V characteristics of the proposed NDC block. Four applications based on this NDC block are proposed: (1) Multiple-valued logic static memory cell (2) Schmitt trigger (3) Three-stage ring oscillator (4) ternary full adder using hybrid single-electron transistor and MOS technology. Simulation was done using Cadence Spectre simulator with 180nnm CMOS model and SET MIB macro mode to estimate the performance.
Recommended Citation
Li, Lin, "DESIGN OF MULTI-VALUED LOGIC CELLS USING SINGLE-ELECTRON DEVICES" (2016). Electronic Theses and Dissertations. 5743.
https://scholar.uwindsor.ca/etd/5743